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high precision 10 v reference ad688 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent ri ghts of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2005 analog devices, inc. all rights reserved. features 10 v tracking outputs kelvin connections low tracking error: 1.5 mv low initial error: 2.0 mv low drift: 1.5 ppm/c low noise: 6 v p-p flexible output force and sense terminals high impedance ground sense wide body soic and cerdip packages general description the ad688 is a high precision 10 v tracking reference. low tracking error, low initial error, and low temperature drift give the ad688 reference absolute 10 v accuracy performance previously unavailable in monolithic form. the ad688 uses a proprietary ion-implanted buried zener diode, and laser wafer drift trimming of high stability thin-film resistors to provide outstanding performance. the ad688 includes the basic reference cell and three additional amplifiers. the amplifiers are laser-trimmed for low offset and low drift and maintain the accuracy of the reference. the amplifiers are configured to allow kelvin connections to the load and/or boosters for driving long lines or high current loads, delivering the full accuracy of the ad688 where it is required in the application circuit. the low initial error allows the ad688 to be used as a system reference in precision measurement applications requiring 12-bit absolute accuracy. in such systems, the ad688 can provide a known voltage for system calibration; the cost of periodic recalibration can therefore be eliminated. furthermore, the mechanical instability of a trimming potentiometer and the potential for improper calibration can be eliminated by using the ad688 and calibration software. the ad688 is available in commercial version. specified over the ?40 o c to +85 o c temperature range, the ad688 is offered in wide body 16-lead soic and 16-lead cerdip packages, functional block diagram r3 r b r1 r2 r4 r5 r6 gain adj gnd sense +in nc v low bal adj nc a4 in ?v s +v s ?10v out force ?10v out sense +10v out force +10v out sense a3 in v high noise reduction a1 a4 a3 a2 ad688 7 6 4 3 1 14 2 15 16 5 9 10 8 12 11 13 00815-001 nc = no connect figure 1. product highlights 1. precision tracking. the ad688 offers precision tracking 10 v kelvin output connections with no external components. tracking error is less than 1.5 mv and fine- trim is available for applications requiring exact symmetry between the +10 v and ?10 v outputs. 2. accuracy. the ad688 offers 12-bit absolute accuracy without any user adjustments. optional fine-trim connections are provided for applications requiring higher precision. the fine-trimming does not alter the operating conditions of the zener or the buffer amplifiers and thus does not increase the temperature drift. 3. low output noise. output noise of the ad688 is low typically 6 v p-p. a pin is provided for broadband noise filtering using an external capacitor.
ad688 rev. b | page 2 of 16 table of contents specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 theory of operation ........................................................................ 6 applications ....................................................................................... 7 calibration ..................................................................................... 7 noise performance and reduction ............................................ 8 tur n on ti me ................................................................................8 temperature performance ............................................................9 kelvin connections .......................................................................9 dynamic performance ............................................................... 11 bridge driver circuit ................................................................. 12 outline dimensions ....................................................................... 13 ordering guide .......................................................................... 13 revision history 3/05rev. a to rev. b updated format..................................................................universal added AD688ARWZ .........................................................universal removed ad688sq ...........................................................universal updated outline dimensions ....................................................... 13 changes to ordering guide .......................................................... 13
ad688 rev. b | page 3 of 16 specifications typical @ 25c, +10 v output, v s = 15 v unless otherwise noted. 1 specifications shown in boldface are tested on all production units at final electrical test. results from those tests are used to calculate outgoing quality levels. all min and max specifications a re guaranteed. table 1. ad688aq ad688bq AD688ARWZ min typ max min typ max min typ max unit output voltage error +10 v, ? 10 v outputs ?5 +5 ?2 +2 ?4 +4 mv 10 v tracking error ?3 +3 ?1.5 +1.5 ?1.5 +1.5 mv output voltage drift +10 v, ?10 v outputs 0c to +70c (a, b) 2 C1.5 +1.5 ppm/c ?40c to +85c (a, b) ?3 +3 C3 +3 C8 +8 ppm/c gain adj and bal adj 2 trim range 5 5 5 mv input resistance 150 150 150 k? line regulation t min to t max 3 C200 +200 C200 +200 C200 +200 v/v load regulation t min to t max +10 v output, 0 ad688 rev. b | page 4 of 16 absolute maximum ratings table 2. parameter rating +v s to ?v s 36 v power dissipation (25c) q package 600 mw storage temperature ?65c to +150c lead temperature (soldering, 10 s) +300c package thermal resistance q ( ja / jc ) 120/35c/w output protection: all outputs safe if shorted to ground stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. esd caution esd (electrostatic discharge) sensiti ve device. electrostatic charges as hi gh as 4000 v readily accumulate on the human body and test equipment and can discharge wi thout detection. although this product features proprietary esd protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd preca utions are recommended to avoid performance degrada- tion or loss of functionality.
ad688 rev. b | page 5 of 16 pin configuration and fu nction descriptions +10v out force 1 +v s 2 +10v out sense 3 a3 in 4 ?v s 16 ?10v out force 15 ?10v out sense 14 a4 in 13 gain adj 5 bal adj 12 v high 6 nc 11 noise reduction 7 nc 10 v low 8 gnd sense +in 9 nc = no connect ad688 top view (not to scale) 00815-002 figure 2. pin configuration table 3. pin function descriptions pin o. neonic description 1 +10 v out force +10 v output with ke lvin force. connect to pin 3. 2 +v s positive power supply. 3 +10 v out sense +10 v output with ke lvin sense. connect to pin 1. 4 a3 in + input to a3. connect to v high , pin 6. 5 gain adj reference gain adjustment for ca libration. see the calibration section. 6 v high unbuffered reference high output. 7 noise reduction noise filtering pin. connect external 1 f capaci tor to ground to reduce output noise, see the noise performance and reduction section. may be left open. 8 v low unbuffered reference low output. 9 gnd sense +in gound with kelvin sense. 10 nc no connection. leave floating. 11 nc no connection. leave floating. 12 bal adj reference centering adjustment for calibration. see the calibration section. 13 a4 in + input to a4. connect to v low , pin 8. 14 ?10 v out sense ?10 v output with ke lvin sense. connect to pin 15. 15 ?10 v out force ?10 v output with ke lvin force. connect to pin 14. 16 ?v s negative power supply.
ad688 rev. b | page 6 of 16 theory of operation the ad688 consists of a buried zener diode reference, amplifiers and associated thin-film resistors as shown in figure 3. the temperature compensation circuitry provides the device with a temperature coefficient of 1.5 ppm/c or less. amplifier a1 performs several functions. a1 primarily acts to amplify the zener voltage to the required 20 v. in addition, a1 also provides for external adjustment of the 20 v output through pin 5 (gain adj). using the bias compensation resistor between the zener output and the noninverting input to a1, a capacitor can be added at the noise reduction pin (pin 7) to form a low-pass filter and reduce the noise contribution of the zener to the circuit. two matched 12 k? nominal thin-film resistors (r4 and r5) divide the 20 v output in half. ground sensing for the circuit is provided by amplifier a2. the noninverting input (pin 9) senses the system ground and forces the midpoint of resistors r4 and r5 to be a virtual ground. pin 12 (bal adj) can be used for fine adjustment of this midpoint transfer. amplifiers a3 and a4 are internally compensated and are used to buffer the voltages at pin 6 and pin 8 as well as to provide a full kelvin output. thus, the ad688 has a full kelvin capability by providing the means to sense a system ground, and forced and sensed outputs referenced to that ground. r3 r b r1 r2 r4 r5 r6 gain adj gnd sense +in nc v low bal adj nc a4 in ?v s +v s ?10v out force ?10v out sense +10v out force +10v out sense a3 in v high noise reduction a1 a4 a3 a2 ad688 7 6 4 3 1 14 2 15 16 5 9 10 8 12 11 13 00815-003 nc = no connect figure 3. functional block diagram
ad688 rev. b | page 7 of 16 applications the ad688 can be configured to provide 10 v reference outputs as shown in figure 4. the architecture of the ad688 provides ground sense and uncommitted output buffer amplifiers which offer the user a great deal of functional flexibility. the ad688 is specified and tested in the configuration shown in figure 4. the user may choose to take advantage of other configuration options available with the ad688; however performance in these configurations is not guaranteed to meet the stringent data sheet specifications. unbuffered outputs are available at pin 6 and pin 8. loading of these unbuffered outputs will impair circuit performance. amplifiers a3 and a4 can be used interchangeably. however, the ad688 is tested (and the specifications are guaranteed) with the amplifiers connected as indicated in figure 4. when either a3 or a4 is unused, its output force and sense pins should be connected and the input tied to ground. two outputs of the same voltage polarity may be obtained by connecting both a3 and a4 to the appropriate unbuffered output on pin 6 or pin 8. performance in these dual output configurations will typically meet data sheet specifications. r3 r b r1 r2 r4 r5 r6 a1 a4 ad688 a3 a2 system ground +10v +15v supply ?10v ?15v supply system ground 0.1 f 0.1 f 7 6 4 3 1 14 2 15 16 5 9 10 8 12 11 13 00815-004 figure 4. +10 v and ?10 v outputs calibration generally, the ad688 will meet the requirements of a precision system without additional adjustment. initial output voltage error of 2 mv and output noise specs of 6 v p-p allow for accuracies of 12 to 16 bits. however, in applications where an even greater level of accuracy is required, additional calibration may be called for. the provision for trimming has been made through the use of the gain adj and bal adj pins (pin 5 and pin 12, respectively). the ad688 provides a precision 20 v span with a center tap which is used with the buffer and ground sense amplifiers to achieve the 10 v output configuration. gain adj and bal adj can be used to trim the magnitude of the 20 v span voltage and the position of the center tap within the span. the gain adjustment should be performed first. although the trims are not interactive within the device, the gain trim will move the balance trim point as it changes the magnitude of the span. figure 5 shows the gain and balance trims of the ad688. a 100 k? 20-turn potentiometer is used for each trim. the potentiometer for the gain trim is connected between pin 6 (v high ) and pin 8 (v low ) with the wiper connected to pin 5 (gain adj). the potentiometer is adjusted to produce exactly 20 v between pin 1 and pin 15, the amplifier outputs. the balance potentiometer, also connected between pin 6 and pin 8 with the wiper to pin 12 (bal adj), is then adjusted to center the span from +10 v to ?10 v. input impedance on both the gain adj and the bal adj pins is approximately 150 k?. the gain adjustment trim network effectively attenuates the 20 v across the trim potentiometer by a factor of about 1150 to provide a trim range of C5.8 mv to +12.0 mv with a resolution of approximately 900 v/turn (20-turn potentiometer). the balance adjustment trim network attenuates the trim voltage by a factor of about 1250, providing a trim range of 8 mv with a resolution of 800 v/turn. trimming the ad688 introduces no additional errors over temperature, so precision potentiometers are not required. when balance adjustment is not necessary, pin 12 should be left floating. if gain adjustment is not required, pin 5 should also be left floating. r3 r b r1 r2 r4 r5 r6 a1 a4 ad688 a3 a2 system ground +10v +15v supply ?10v ?15v supply system ground 0.1 f 0.1 f 100k ? 20t balance adjust 100k ? 20t gain adjust +15v noise reduction 1 f 7 6 4 3 1 14 2 15 16 5 9 10 8 12 11 13 20k ? 00815-005 figure 5. gain and balance adjustment with noise reduction
ad688 rev. b | page 8 of 16 noise performance and reduction the noise generated by the ad688 is typically less than 6 v p-p over the 0.1 hz to 10 hz band. noise in a 1 mhz bandwidth is approximately 840 v p-p. the dominant source of this noise is the buried zener which contributes approximately 140 nv/hz. in comparison, the op amps contribution is negligible. figure 6 shows the 0.1 hz to 10 hz noise of a typical ad688. 00815-006 1 v 1mv 5s 100 90 10 0% figure 6. 0.1 hz to 10 hz noise if further noise reduction is desired, an optional capacitor can be added between the noise reduction pin and ground as shown in figure 5. this will form a low-pass filter with the 5 k? r b on the output of the zener cell. a 1 f capacitor will have a 3 db point at 32 hz and will reduce the high frequency noise (to 1 mhz) to about 250 v p-p. figure 7 shows the 1 mhz noise of a typical ad688 both with and without a 1 f capacitor. 200 v 50 s c n = 1 f no c n 00815-007 figure 7. effect of 1 f noise re duction capacitor on broadband noise turn on time upon application of power (cold start), the time required for the output voltage to reach its final value within a specified error is the turn on settling time. two components normally associated with this are: time for active circuits to settle and time for thermal gradients on the chip to stabilize. figure 8 and figure 9 show the turn on characteristics of the ad688. they show the settling time to be about 600 s. note the absence of any thermal tails when the horizontal scale is expanded to 2 ms/cm in figure 9. 00815-008 100 90 10 0% +v s ?v s +v out 10v 1mv 100 s 10v figure 8. turn on characteristics: electrical turn on 00815-009 100 90 10 0% +v s ?v s +v out 10v 1mv 2ms 10v figure 9. turn on characteristics: extended time scale output turn on time is modified when an external noise reduction capacitor is used. when present, this capacitor presents an additional load to the internal zener diodes current source, resulting in a somewhat longer turn on time. in the case of a 1 f capacitor, the initial turn on time is approximately 100 ms (figure 10). when the noise reduction feature is used, a 20 k? resistor between pin 6 and pin 2 is required for proper startup. 00815-010 100 90 10 0% +v s ?v s +v out 10v 1mv 20ms 10v figure 10. turn on with 1 f c n
ad688 rev. b | page 9 of 16 temperature performance the ad688 is designed for precision reference applications where temperature performance is critical. extensive temperature testing ensures that the devices high level of performance is maintained over the operating temperature range. figure 11 shows the typical output voltage drift and illustrates the test methodology. the box in figure 11 is bounded on the sides by the operating temperature extremes, and on top and bottom by the maximum and minimum +10 v output error voltages measured over the operating temperature range. the slopes of the diagonals drawn for both the +10 v and C10 v outputs determine the performance grade of the device. 6 ?6 00815-011 temperature ( c) error voltage from 10v (mv) 5 4 3 2 1 0 ?1 ?2 ?3 ?4 ?5 ?10v out +10v out slope +10v e max +10v e min t min ?60 ?50 ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 +10v output slope = t.c. = 2.2mv ? ?3.2mv (85 c??40 c) 10 10 ?6 = e max ? e min (t max ? t min ) 10 10 ?6 = 3ppm/ c t max figure 11. typical ad688aq temperature drift each ad688a and b grade unit is tested at ?40c, ?25c, 0c, +25c, +50c, +70c, and +85c. this approach ensures that the variations of output voltage that occur as the temperature changes within the specified range will be contained within a box whose diagonal has a slope equal to the maximum specified drift. the position of the box on the vertical scale will change from device to device as initial error and the shape of the curve vary. maximum height of the box for the appropriate temperature range is shown in figure 12. maximum output change (mv) device grade 0 to +70 c ?40 c to +85 c ad688aq ad688bq AD688ARWZ 1.40 (typ) 3.75 3.75 1.05 00815-012 4.0 figure 12. maximum + 10 v or ?10 v output change duplication of these results requires a combination of high accuracy and stable temperature control in a test system. evaluation of the ad688 will produce curves similar to those in figure 11, but output readings may vary depending on the test methods and equipment utilized. kelvin connections force and sense connections, also referred to as kelvin connections, offer a convenient method of eliminating the effects of voltage drops in circuit wires. as seen in figure 13a, the load current and wire resistance produce an error (v error = r i l ) at the load. the kelvin connection of figure 13b overcomes the problem by including the wire resistance within the forcing loop of the amplifier and sensing the load voltage. the amplifier corrects for any errors in the load voltage. in the circuit shown, the output of the amplifier would actually be at 10 v + v error and the voltage at the load would be the desired 10 v. ? + 10v r i l v = 10v ? ri l r load r r i l r load v = 10v + ri l v = 10v i = 0 i = 0 00815-014 a. b. r figure 13. advantage of kelvin connection the ad688 has three amplifiers which can be used to implement kelvin connections. amplifier a2 is dedicated to the ground force-sense function while uncommitted amplifiers a3 and a4 are free for other force-sense chores. in some applications, one amplifier may be unused. in such cases, the unused amplifier should be connected as a unity-gain follower (force and sense pins tied together) and the input should be connected to ground. an unused amplifier may be used for other circuit functions as well. figure 14 through figure 19 show the typical performance of a3 and a4.
ad688 rev. b | page 10 of 16 frequency (hz) 100 ?20 10 10m 100 open-loop gain (db) 1k 10k 100k 1m 80 60 40 20 0 gain phase 0 ?180 ?30 ?60 ?90 ?120 ?150 phase (degrees) 00815-015 figure 14. a3, a4 open-loop frequency response 00815-016 frequency (hz) 110 0 10 10m 100 cmrr (db) 1k 10k 100k 1m 100 80 60 40 20 v s = r 15v v cm = 1v p-p 25 q c figure 15. a3, a4 cmr vs. frequency frequency (hz) 110 10 10 10m 100 power supply rejection (db) 1k 10k 100k 1m 100 80 60 40 20 v s = r 15v with 1v p-p sine wave +supply ?supply 00815-017 figure 16. a3, a4 psr vs. frequency 00815-018 frequency (hz) 1 10k 10 noise spectral density (nv/ hz) 100 1k 100 90 0 80 70 60 50 40 30 20 10 figure 17. input noise voltage spectral density 00815-019 100 90 10 0% 5v 50 p s figure 18. unity-gain follower pulse response (large signal) 00815-020 100 90 10 0% 50mv 2 p s figure 19. unity-gain follower pulse response (small signal)
ad688 rev. b | page 11 of 16 dynamic performance the output buffer amplifiers (a3 and a4) are designed to provide the ad688 with static and dynamic load regulation superior to less complete references. many a/d and d/a converters present transient current loads to the reference, and poor reference response can degrade the converters performance. figure 20, figure 21, and figure 22 display the characteristic of the ad688 output amplifier driving a 0 ma to 10 ma load. 10v a3 or a4 v out i l 1k ? 10v 0v v l 00815-021 figure 20. transient load test circuit 00815-022 v out v l 200mv 5v 500ns 100 90 10 figure 21. large-scale transient response 00815-023 100 90 10 0% 1mv 5v 2 s v out v l figure 22. fine-scale settling for transient load figure 23 and figure 24 display the output amplifier characteristic driving a 5 ma to 10 ma load, a common situation found when the reference is shared among multiple converters or is used to provide bipolar offset current. 10v a3 or a4 v out i l 10v 0v v l + ? 2k ? 2k ? 00815-024 figure 23. transient and constant load test circuit 00815-025 100 90 10 0% 1mv 200mv 1 s v out 200mv/ cm v out 1mv/cm 5v v l figure 24. transient response 5 ma to 10 ma load in some applications, a varying load may be both resistive and capacitive in nature, or may be connected to the ad688 by a long capacitive cable. figure 25 and figure 26 display the output amplifier characteristics driving a 1000 pf, 0 ma to 10 ma load. 10v v out 10v 0v v l 1k ? 1000pf c l 00815-026 figure 25. capacitive load transient response test circuit 00815-027 100 90 10 0% 5v 200mv 1 s c l = 0 c l = 1000pf v l figure 26. output response with capacitive load figure 27 and figure 28 display the crosstalk between output amplifiers. the top trace shows the output of a4, dc-coupled and offset by 10 v, while the output of a3 is subjected to a 0 ma to 10 ma load current step. the transient at a4 settles in about 1 s, and the load-induced offset is about 100 v.
ad688 rev. b | page 12 of 16 10v 0v v l 1k ? 10v v out 10v a4 a3 + ? + ? 00815-028 figure 27. load crosstalk test circuit 00815-029 100 90 10 0% 1mv 5v 2 s v out v l figure 28. load crosstalk attempts to drive a large capacitive load (in excess of 1000 pf) may result in ringing or oscillation, as shown in the step response photo (figure 29). this is due to the additional pole formed by the load capacitance and the output impedance of the amplifier, which consumes phase margin. the recom- mended method of driving capacitive loads of this magnitude is shown in figure 30. the 150 ? resistor isolates the capacitive load from the output stage, while the 10 k? resistor provides a dc feedback path and preserves the output accuracy. the 1 f capacitor provides a high frequency feedback loop. the performance of this circuit is shown in figure 31. 00815-030 100 90 10 0% 10v 1v 200 s v in v out figure 29. output amplifier step response, c l = 1 f v in v out + ? 10k ? 1 f c l 1 f 150 ? 00815-031 figure 30. compensation for capacitive loads 00815-032 100 90 10 0% 10v 1v 200 s v in v out figure 31. output amplifier step response using figure 30 compensation bridge driver circuit the wheatstone bridge is a common transducer. in its simplest form, a bridge consists of four 2-terminal elements connected to form a quadrilateral, a source of excitation connected along one of the diagonals and a detector comprising the other diagonal. in this unipolar drive configuration, the output voltage of the bridge is riding on a common-mode voltage signal equal to approximately v in /2. further processing of this signal may necessarily be limited to high common-mode rejection techniques such as instrumentation or isolation amplifiers. however, if the bridge is driven from a pair of bipolar supplies, then the common-mode voltage is ideally eliminated and the restrictions on any processing elements that follow are relaxed. as shown in figure 32, the ad688 is an excellent choice for the control element in a bipolar bridge driver scheme. transistors q1 and q2 serve as series pass elements to boost the current drive capability to the 57 ma required by the typical 350 ? bridge. a differential gain stage may still be required if the bridge balance is not perfect. r3 r b r1 r2 r4 r5 r6 ?v s +v s a1 a4 ad688 a3 a2 q 1 = 2n3904 220 ? +15v ?15v 220 ? q 2 = 2n3906 e o + ? 7 6 4 3 14 2 15 16 5 9 10 8 12 11 13 1 00815-033 figure 32. bipolar bridge drive
ad688 rev. b | page 13 of 16 outline dimensions controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. 16 1 8 9 0.310 (7.87) 0.220 (5.59) 0.005 (0.13) min 0.098 (2.49) max 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) seating plane 0.200 (5.08) max 0.840 (21.34) max 0.150 (3.81) min 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.100 (2.54) bsc 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) pin 1 figure 33. 16-lead ceramic dual in-line package [cerdip] (q-16) dimensions shown in inches and (millimeters) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-013aa seating plane 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) bsc 16 9 8 1 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 10.50 (0.4134) 10.10 (0.3976) 8 0 0.75 (0.0295) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) 0.33 (0.0130) 0.20 (0.0079) coplanarity 0.10 figure 34. 16-lead standard small outline package [soic] wide body (rw-16) dimensions shown in mi llimeter and (inches) ordering guide model initial error temperature coefficient temperature range package description package option ad688aq 5 mv 3 ppm/c ?40c to + 85c 16-lead cerdip q-16 ad688bq 2 mv 3 ppm/c ?40c to + 85c 16-lead cerdip q-16 AD688ARWZ 1 4 mv 8 ppm/c ?40c to + 85c 16-lead soic rw-16 1 z = pb-free part.
ad688 rev. b | page 14 of 16 notes
ad688 rev. b | page 15 of 16 notes
ad688 rev. b | page 16 of 16 notes ? 2005 analog devices, inc. all ri ghts reserved. trademarks and registered trademarks are the prop erty of their respective owners. c00815-0-3/05(b)

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